Ladder logic




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LADDER LOGIC
There are various methods of programming a PLC. Two of these include Ladder Logic and Function Block Diagrams. The choice of which method is dependent on whether the operation being automated is machine control or process control oriented. Ladder Logic is the method of choice in the case of machine control and Function Block for process control.
Ladder Schematics
Electricians are familiar and comfortable with ladder schematics. These diagrams depict two vertical lines called rails. The rails provide power to the circuitry of the schematic. The power can be AC or DC and the voltage may vary depending on the requirements. Standard labeling for rails is L1 and L2.
Circuitry is placed between the rails connecting the two power lines. These individual lines are referred to as rungs. The circuitry is typically very specific for ladder schematics. For instance, in the following diagram note the first rung consists of a start button that is actually a momentary switch.

Inputs


Outputs

L1

L2



Ladder Rail


Ladder Rung

Figure 14. Ladder Schematic.
Rungs are composed of inputs and outputs. If an imaginary line is drawn down the middle of the previous diagram all the inputs (switches, etc.) are located to the left. Outputs (lights, etc.) are located to the right. Locating all inputs on the left side of a rung and all outputs on the right is good design practice but not required. The latest software versions allow inputs and outputs to be intermixed on a single rung.

Ladder Diagrams
Ladder diagrams are very similar to ladder schematics. A ladder diagram is a symbolic representation of an electrical circuit. That is, specifics concerning switches, etc. are replaced with generic symbols but the same functionality is represented. The primary factor driving the ladder logic design was the requirement to make the system as familiar as possible to the primary users: electricians. Therefore, the symbols utilized closely resemble (if not identical to) schematic symbols for electrical devices. The following diagram is the ladder logic equivalent of the previous ladder schematic.


Relay Coil

Equivalent

Input


Module

Output

Module





M

G

R

Relay Contact

Equivalent



Rung 1

Rung 2

Rung 3

Figure 15. Ladder Diagram with I/O detail included.


Note each device from the ladder schematic has been replaced with an equivalent symbol. The result is a collection of input and output symbols that represent the general operation of the device but not how that action is achieved. Also note that representing a switch or output device generically means the ladder diagram simply represents the function of a switch or motor by whether it is closed/open or off/on, respectively.

Outputs and Inputs/Sensors
Outputs from a PLC are referred to as coils on a ladder diagram. A coil may represent a motor, light, pump, counter, timer, relay, etc. The following displays how a coil is represented in a ladder diagram.

Figure 16. Coil representation in a ladder diagram.


Inputs/Sensors to a PLC are referred to as Contacts and may consist of switches, buttons, etc. Contacts begin in one of two states normally open or normally closed. A graphical representation of a normally open and closed contact is depicted as it would appear in a ladder diagram.

Figure 17. Normally Open and Closed representation in a ladder diagram.


These contacts have an initial and follow-on state. The states are best described if the contact is thought of as a switch. Normally open describes a switch whose initial state is open. Therefore, with power applied to both rails of a ladder diagram the initial state of a normally open switch would not complete the connection. When activated the switch changes to its follow-on state. That is, the switch closes completing the connection between the ladder rails. Switch positions for both states are shown in the following Figure.

Initial State





Follow–On State



Figure 18. The NO and NC schematic representation for a limit switch.

Note that simply applying power to the rails will not necessarily result in a follow-on state for a contact.


The DC equivalent circuit and ladder diagram for a normally open contact follows:

Normally Closed describes a switch whose initial state is closed. When activated the switch changes to an open state. The following diagram depicts a normally closed push button and how it will operate when connected to a light and battery. If the button is not pressed then the circuit is complete and the light is on. However, if the button is pressed or activated the circuit is broken and the light is off.


Pushbutton

Single Input



Pressed (0)

Light

Not Pressed (1)

On (1)

Pushbutton

Off (0)

Truth table

+

_

Figure 19. Circuit schematic of a NC pushbutton and light and the circuit’s truth

table. The light will be on (initial state) if the pushbutton is not pressed.


This circuit is represented in a ladder diagram as follows:

If the push button, in the diagram, is a normally open contact then the initial state would be an incomplete circuit and the light will be off. When pressed the button changes states from open to close and the circuit is completed thereby powering the light.


Fundamental Logic
Situations will arise that require two or more events to occur prior to activation of a coil (output device). That is, switch A and switch B must both be closed (or be true) for the light to turn on. The relation between switches A and B and the light is referred to as an ‘AND’ function. The following depicts a circuit, truth table, and the logical gate for this ‘AND’ relationship. The truth table shows all the switch position combinations and the resulting outcome for the light. The AND gate is a graphical method for representing AND situations in a logic diagram.


Figure 20. Circuit schematic with an AND configuration.
The end result is every contact ANDed together must be closed for the light to activate.
The corresponding ladder diagram for the AND scenario is:

A problem statement depicting an AND situation might be:


A drill press requires the operator to have one hand on each switch before the machine will activate. Switch A and B represent the hand-activated switches and the light turning on simulates the drill press activation.
Launching of nuclear missiles is also an AND scenario. Two keys must be turned simultaneously to launch. What is another AND scenario?
Problem statements will sometimes include situations calling for an output to be triggered by any number of individual or unrelated events. That is, either switch A or B must be closed (or be true) for the light to turn on. The relation between switches A, B and the light is referred to as an ‘OR’ function. The following depicts a circuit, truth table, and the logical gate for this ‘OR’ relationship.

Figure 21. Circuit schematic with an OR configuration.


Reviewing the OR truth table indicates the differences between ORs and ANDs. Any of the OR options is sufficient to activate the light by itself or in combination with any of the other or all of the OR options. When depicting OR scenarios in ladder diagrams each option is referred to as a branch.

The corresponding ladder diagram for the previous OR scenario is:


A problem statement depicting the OR situation might be:


Stopping a garage door in an emergency situation may be accomplished by either pressing the stop button or by placing an object in the path of the electric eye. Switch A represents the stop button, switch B represents the electric eye sensor and the light represents the garage door. If the light is on the garage door is stopped.
What are some other OR scenarios?
Ladder Diagram Rules


    1. A ladder diagram is read like a book; from left to right and from top to bottom

    2. The vertical power lines or rails may be labeled L1, L2 or they may be labeled X1, X2 when the voltage potential is derived from a transformer

    3. Devices or components are shown in order of importance whenever possible. Stop buttons should be given a higher order of importance and therefore be shown ahead of other devices.

    4. Electrical devices are shown in their normal condition. The normal condition of electrical diagrams is the circuit deenergized and with no external forces such as pressure, flow, etc. acting on the device.

    5. Contacts associated with relays, timers, motor starters, etc. always have the same number or letter designation as the device that controls them. This holds true no matter where the contacts appear in the circuit. For example, in the ladder diagram presented on page 15, note the coil labeled M on rung 1. Then note the two contacts in rungs 2 and 3 both have an M below them. This signifies these contacts as being controlled by the coil in rung 1.

    6. All contacts associated with a device change state when the device is energized. In regard to the previous example when the coil in rung 1 is activated then any contact controlled by that coil will change from its current state to the follow-on state. Therefore, in rung 2 the Normally Closed (NC) contact will open. The Normally Open (NO) contact in rung 3 will close.

    7. Devices that perform a STOP function are normally placed in series on a rung.

    8. Devices that perform a START function are normally placed in parallel or in a branch configuration.


Branch Instructions
There are often occasions when it is desired to turn on an output for more than one condition. For example, the doorbell should sound if either the front or rear door button is pushed. The OR option created by the front or rear door button activating the bell is produced in ladder diagrams through a branch. The branch produces two paths that may activate the doorbell.


C

Figure 31. An Or branch for front and rear door bell operation.
If the front door switch (A) is closed, electricity can flow to the bell. Or if the rear door switch (B) is closed, electricity can flow through the bottom branch to the bell. That is, if at least one of the parallel branches forms a true logic path, the run logic is enabled.
Branches may be composed of single or multiple components. Note in the following the first branch consists of an AND function and the lower branch is simply a single component.

D

Figure 32. A compound branch configuration.
Coil D is activated when either A and B OR C OR A, B, AND C are closed. On some PLC models, branches may be utilized for both inputs and outputs on a rung.

C

D

E

Figure 33. An OR configuration for both inputs and outputs.


Parallel output branching allows a single input to activate multiple outputs simultaneously. Note that if such a configuration is not permitted by the PLC design the ladder diagram may be reconfigured to accommodate the needed functionality. Redesign the ladder using the space below.

MEMORY ORGANIZATION


Memory organization refers to how certain areas of memory in a PLC are utilized. Not all PLC manufacturers organize memory in the same manner but even so the principles involved are the same.
Physical addressing, discussed in a previous section, is the ability to read data from a specific module terminal or write information to a specific module terminal. When information is read from a contact or input it is stored in memory. A portion of memory, the input image map, is designated to store this input information. Each input typically has, at a minimum, a single bit designated to store its information.

Figure 22. Associating input and output data with its corresponding memory

location.
Data resulting from logical analysis by the CPU is stored in memory labeled as the output image map. From this point the information is transferred to a designated output module and then to the particular field device.
This example highlights how portions of memory are designated for particular operations. The memory organization or memory map for a MicroLogix PLC is depicted below. Each segment is assigned a specific function or assists in the performance of a function. For instance, the Timer file stores all information related to any timer utilized by the PLC. This includes status, control, and bit information. Timer information will not be stored in the counter file.
Utilizing memory in this manner provides for speedy storage and retrieval of data. However, the pre-assigned blocks of memory can

Figure 23. Memory allocation for the MicrolLogix 1000.


lead to inefficiency in cases where all the memory space is allocated but more is needed. There might be free memory in the counter block but this cannot be used since it is designated only for counters.
When referencing timers and counters, each will be identified as T4.0 and C5.0, respectively for the Micrologix 1000. The T4 corresponds to the file location. The 0 identifies the specific timer instance. Each instance has multiple pieces of information associated with it such as timer status and data information.
Memory utilization or assignment in the ControlLogix reflects the schemas incorporated into everyday personal computers. When a timer or counter is added to a ladder diagram the memory addresses are not automatically selected from a predefined block. Most recently designed PLCs will reserve a segment of memory based on the needs of the single device/instruction set. The memory segment is large enough to store all the information related to the device/instruction. For instance, a timer will require memory to store bit status and control bit information so the predefined segment includes locations for each.
This is very similar to the MicroLogix memory schema utilization except the predefined segment can reside anywhere in the RAM of the PLC. The result is memory segments for timers, counters, etc. interspersed throughout the RAM. This produces a much more efficient use of memory but requires more complex storage and retrieval algorithms in comparison to the MicroLogix scheme.

SCANNING PROCESS


The PLC’s CPU monitors the status of all inputs. It takes these values and energizes or de-energizes the outputs according to the ladder diagram/user program. This is referred to as scanning. A scan does not consist of a PLC executing ladder diagrams rung by rung. Instead the PLC performs an I/O and program scan. The I/O scan transfers data to and from the output and input modules, respectively. The information is transferred in the form of bits and stored in image tables. Remember image tables are blocks of memory designated to store the input and output bit state. The input and output modules are the portion of the PLC that interface with the outside world. The actual bridge between the physical world and the internal world of the PLC is the optical isolation circuitry.


Memory




Take some action

Input Modules

Output Modules

Input data

Output

data


Examine data

Return result

Program

Check/compare/examine specific conditions

Input

Output

Figure 24. Internal view of PLC scan cycle.

The scan begins by transferring data from the output image table to the output module. This is followed by the PLC taking a snapshot of the current input signals registered in the input module. This snapshot

Figure 25. Data flow from the PLC to a controlled output.

Figure 26. Data flow into the PLC from an input source.

of data is transferred from the input module to the input image table. The next phase is the program scan. The CPU utilizes the snapshot of the input image table to perform a logical evaluation via the ladder logic. Results of this logical evaluation are written to the output image

map during the final step of the program scan cycle. If a coil is true (active, high) a one is written to the corresponding bit in the output image table, otherwise a zero is written to the bit denoting the contact as false (inactive, low). Therefore, the CPU bases its decisions on states of the inputs prior to entering the program scan. If an input is changed during the scan it will not register until the next scan cycle. Completion of the program scan ends a single scan cycle and then the process begins again with the I/O scan.


Processor Memory


Input


Module

Output

Module


Data

Input device



Output device

I/3

I/3

O/5

O/5

Program

Input

Image


table

Output

Image


table

Figure 27. Physical and internal view of PLC scan cycle .
Scanning Steps

    1. Transfer output map bits to the output module (I/O scan)

    2. Input module signals are frozen i.e. snapshot is taken (I/O scan)

    3. Transfer input module bits to the input image map (I/O scan)

    4. The next phase is initiated by the CPU reading all data bits currently in the input image map (Program scan)

    5. CPU evaluates/performs ladder logic on current set of data bits (Program scan)

    6. Results of evaluation transferred to the output image map

(Program scan)

FAIL-SAFE DESIGN


Fail-Safe Design is the procedure of programming to assure safety of the operator and processes. An example of this type of design is requiring two hand switches and a part presence sensor to be closed before a machine will activate. In this scenario the design ensures there is a part in the machine and both hands of the operator are in a safe location.
Consider the selection of electrical connections from a Fail-Safe standpoint. If wires are cut or connections fail, the equipment should still be safe. For example, if a normally closed stop button is used, and the connector is broken, it will cause the machine to stop as if the stop button has been pressed. Fail-Safe Design rules of thumb for selecting NO or NC devices are as follows:
NO – When wiring switches or sensors that start actions, use normally open switches so if there is a problem with the switch the process will not start.
NC – When wiring switches that stop processes use normally closed switches so if they fail the process will stop.
Fail-Safe also includes scenarios guaranteeing notification of system failure. Housing alarms utilize closed circuits to indicate that a door or window is in the secure position. So if the window or door is opened the circuit is broken and the alarm system registers this as unsecured. Additionally, this method of design ensures that circuit failures will be detected. Wireless alarm systems depend on batteries for each individual door or window. If the battery dies then the failure of the circuit is registered by the alarm system prompting investigation. If an alarm system utilizes open circuits to indicate a secured door or window and closed circuits as unsecured then failure of a circuit may not be detected.
Design of a fail-safe system requires consideration of these all these scenarios.






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